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Contiki 3.x
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Copyright (c) 2014, Analog Devices, Inc. More...
Go to the source code of this file.
Data Structures | |
| struct | ADI_ADC_TypeDef |
| Analog to Digital Converter (pADI_ADC0) More... | |
| struct | ADI_CLKCTL_TypeDef |
| Clock Control (pADI_CLKCTL) More... | |
| struct | ADI_DMA_TypeDef |
| Direct Memory Access (pADI_DMA) More... | |
| struct | ADI_FEE_TypeDef |
| Flash Controller (pADI_FEE) More... | |
| struct | ADI_GPIO_TypeDef |
| General Purpose Input Output (pADI_GP0) More... | |
| struct | ADI_GPIOCMN_TypeDef |
| General Purpose Input Output (pADI_GPIOCMN) More... | |
| struct | ADI_MISC_TypeDef |
| General Purpose Input Output (pADI_MISC) More... | |
| struct | ADI_I2C_TypeDef |
| I2C (pADI_I2C) More... | |
| struct | ADI_INTERRUPT_TypeDef |
| Interrupts (pADI_INTERRUPT) More... | |
| struct | ADI_PWRCTL_TypeDef |
| Power Management Unit (pADI_PWRCTL) More... | |
| struct | ADI_PWM_TypeDef |
| Pulse Width Modulation (pADI_PWM) More... | |
| struct | ADI_RESET_TypeDef |
| Reset (pADI_RESET) More... | |
| struct | ADI_SPI_TypeDef |
| Serial Peripheral Interface (pADI_SPI0) More... | |
| struct | ADI_TIMER_TypeDef |
| Timer 0 (pADI_TM0) More... | |
| struct | ADI_UART_TypeDef |
| UART (pADI_UART) More... | |
| struct | ADI_WUT_TypeDef |
| WakeUp Timer (pADI_WUT) More... | |
| struct | ADI_WDT_TypeDef |
| Watchdog Timer (pADI_WDT) More... | |
Macros | |
| #define | __CM3_REV 0x0200 |
| #define | __MPU_PRESENT 0 |
| #define | __NVIC_PRIO_BITS 3 |
| #define | __Vendor_SysTickConfig 0 |
| #define | ICTR_RVAL 0x1 |
| Nested Vectored Interrupt Controller (pADI_NVIC) | |
Enumerations | |
| enum | IRQn_Type { Reset_IRQn = -15, NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, MemoryManagement_IRQn = -12, BusFault_IRQn = -11, UsageFault_IRQn = -10, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, WUT_IRQn = 0, EINT0_IRQn = 1, EINT1_IRQn = 2, EINT2_IRQn = 3, EINT3_IRQn = 4, EINT4_IRQn = 5, EINT5_IRQn = 6, EINT6_IRQn = 7, EINT7_IRQn = 8, EINT8_IRQn = 9, UHFTRX_IRQn = 9, WDT_IRQn = 10, TIMER0_IRQn = 12, TIMER1_IRQn = 13, ADC0_IRQn = 14, FLASH_IRQn = 15, UART_IRQn = 16, SPI0_IRQn = 17, SPI1_IRQn = 18, I2CS_IRQn = 19, I2CM_IRQn = 20, DMA_ERR_IRQn = 23, DMA_SPI1_TX_IRQn = 24, DMA_SPI1_RX_IRQn = 25, DMA_UART_TX_IRQn = 26, DMA_UART_RX_IRQn = 27, DMA_I2CS_TX_IRQn = 28, DMA_I2CS_RX_IRQn = 29, DMA_I2CM_TX_IRQn = 30, DMA_I2CM_RX_IRQn = 31, DMA_ADC0_IRQn = 35, DMA_SPI0_TX_IRQn = 36, DMA_SPI0_RX_IRQn = 37, PWM_TRIP_IRQn = 38, PWM_PAIR0_IRQn = 39, PWM_PAIR1_IRQn = 40, PWM_PAIR2_IRQn = 41, PWM_PAIR3_IRQn = 42 } |
Copyright (c) 2014, Analog Devices, Inc.
All rights reserved.
Redistribution and use in source and binary forms, with or without modification, are permitted (subject to the limitations in the disclaimer below) provided that the following conditions are met:
NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
CMSIS Cortex-M3 Core Peripheral Access Layer Header File for default ADUCRF101 Device Series
Definition in file ADuCRF101.h.
1.8.6