Contiki 3.x
platform-conf.h
1 /*
2  * Copyright (c) 2015, SICS Swedish ICT.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  * 3. Neither the name of the Institute nor the names of its contributors
14  * may be used to endorse or promote products derived from this software
15  * without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  *
29  * This file is part of the Contiki operating system.
30  *
31  */
32 
33 #ifndef PLATFORM_CONF_H
34 #define PLATFORM_CONF_H
35 
36 #include <inttypes.h>
37 #include <jendefs.h>
38 
39 #undef putchar
40 
41 /* Delay between GO signal and SFD
42  * Measured 153us between GO and preamble. Add 5 bytes (preamble + SFD) air time: 153+5*32 = 313 */
43 #define RADIO_DELAY_BEFORE_TX ((unsigned)US_TO_RTIMERTICKS(313))
44 /* Delay between GO signal and start listening
45  * Measured 104us: between GO signal and start listening */
46 #define RADIO_DELAY_BEFORE_RX ((unsigned)US_TO_RTIMERTICKS(104))
47 /* Delay between the SFD finishes arriving and it is detected in software */
48 #define RADIO_DELAY_BEFORE_DETECT ((unsigned)US_TO_RTIMERTICKS(14))
49 
50 /* Micromac configuration */
51 
52 #ifndef MIRCOMAC_CONF_BUF_NUM
53 #define MIRCOMAC_CONF_BUF_NUM 2
54 #endif
55 
56 #ifndef MICROMAC_CONF_CHANNEL
57 #define MICROMAC_CONF_CHANNEL 26
58 #endif
59 
60 /* 32kHz or 16MHz rtimers? */
61 #ifdef RTIMER_CONF_USE_32KHZ
62 #define RTIMER_USE_32KHZ RTIMER_CONF_USE_32KHZ
63 #else
64 #define RTIMER_USE_32KHZ 0
65 #endif
66 
67 /* Put the device in a sleep mode in idle periods?
68  * If RTIMER_USE_32KHZ is set, the device runs all the time on the 32 kHz oscillator.
69  * If RTIMER_USE_32KHZ is not set, the device runs on the 32 kHz oscillator during sleep,
70  * and switches back to the 32 MHz oscillator (16 MHz rtimer) at wakeup.
71  * */
72 #ifdef JN516X_SLEEP_CONF_ENABLED
73 #define JN516X_SLEEP_ENABLED JN516X_SLEEP_CONF_ENABLED
74 #else
75 #define JN516X_SLEEP_ENABLED 0
76 #endif
77 
78 /* Enable this to get the 32.768kHz oscillator */
79 #ifndef JN516X_EXTERNAL_CRYSTAL_OSCILLATOR
80 #define JN516X_EXTERNAL_CRYSTAL_OSCILLATOR (RTIMER_USE_32KHZ || JN516X_SLEEP_ENABLED)
81 #endif /* JN516X_EXTERNAL_CRYSTAL_OSCILLATOR */
82 
83 /* Core rtimer.h defaults to 16 bit timer unless RTIMER_CLOCK_DIFF is defined */
84 typedef uint32_t rtimer_clock_t;
85 #define RTIMER_CLOCK_DIFF(a, b) ((int32_t)((a) - (b)))
86 
87 /* 8ms timer tick */
88 #define CLOCK_CONF_SECOND 125
89 
90 #if JN516X_EXTERNAL_CRYSTAL_OSCILLATOR
91 #define JN516X_XOSC_SECOND 32768
92 #else
93 #define JN516X_XOSC_SECOND 32000
94 #endif
95 
96 /* Timer conversion*/
97 #if RTIMER_USE_32KHZ
98 #define RADIO_TO_RTIMER(X) ((X) * (JN516X_XOSC_SECOND) / 62500)
99 #else
100  /* RTIMER 16M = 256 * 62500(RADIO) == 2^8 * 62500 */
101 #define RADIO_TO_RTIMER(X) ((rtimer_clock_t)((X) << (int32_t)8L))
102 #endif
103 
104 /* If the timer base a binary 32kHz clock, compensate for this base drift */
105 #if RTIMER_USE_32KHZ && JN516X_EXTERNAL_CRYSTAL_OSCILLATOR
106 /* Drift calculated using this formula:
107 * ((US_TO_TICKS(10000) * 100) - RTIMER_SECOND) * 1e6 = 976.5625 ppm
108 */
109 #define TSCH_CONF_BASE_DRIFT_PPM -977
110 #endif
111 
112 #define DR_11744_DIO2 12
113 #define DR_11744_DIO3 13
114 #define DR_11744_DIO4 14
115 #define DR_11744_DIO5 15
116 #define DR_11744_DIO6 16
117 #define DR_11744_DIO7 17
118 
119 /* Enable power amplifier of JN5168 M05 and M06 modules */
120 #if defined(JN5168_M05) || defined(JN5168_M06)
121 #define RADIO_TEST_MODE RADIO_TEST_MODE_HIGH_PWR
122 #else
123 #define RADIO_TEST_MODE RADIO_TEST_MODE_DISABLED
124 #endif
125 
126 #define TSCH_DEBUG 0
127 
128 #if TSCH_DEBUG
129 #define TSCH_DEBUG_INIT() do { \
130  vAHI_DioSetDirection(0, (1 << DR_11744_DIO2) | (1 << DR_11744_DIO3) | (1 << DR_11744_DIO4) | (1 << DR_11744_DIO5) | (1 << DR_11744_DIO6) | (1 << DR_11744_DIO7)); \
131  vAHI_DioSetOutput(0, (1 << DR_11744_DIO2) | (1 << DR_11744_DIO3) | (1 << DR_11744_DIO4) | (1 << DR_11744_DIO5) | (1 << DR_11744_DIO6) | (1 << DR_11744_DIO7)); } while(0);
132 #define TSCH_DEBUG_INTERRUPT() do { \
133  static dio_state = 0; \
134  dio_state = !dio_state; \
135  if(dio_state) { \
136  vAHI_DioSetOutput((1 << DR_11744_DIO2), 0); \
137  } else { \
138  vAHI_DioSetOutput(0, (1 << DR_11744_DIO2)); \
139  } \
140 } while(0);
141 #define TSCH_DEBUG_RX_EVENT() do { \
142  static dio_state = 0; \
143  dio_state = !dio_state; \
144  if(dio_state) { \
145  vAHI_DioSetOutput((1 << DR_11744_DIO4), 0); \
146  } else { \
147  vAHI_DioSetOutput(0, (1 << DR_11744_DIO4)); \
148  } \
149 } while(0);
150 #define TSCH_DEBUG_TX_EVENT() do { \
151  static dio_state = 0; \
152  dio_state = !dio_state; \
153  if(dio_state) { \
154  vAHI_DioSetOutput((1 << DR_11744_DIO5), 0); \
155  } else { \
156  vAHI_DioSetOutput(0, (1 << DR_11744_DIO5)); \
157  } \
158 } while(0);
159 #define TSCH_DEBUG_SLOT_START() do { \
160  static dio_state = 0; \
161  dio_state = !dio_state; \
162  if(dio_state) { \
163  vAHI_DioSetOutput((1 << DR_11744_DIO3), 0); \
164  } else { \
165  vAHI_DioSetOutput(0, (1 << DR_11744_DIO3)); \
166  } \
167 } while(0);
168 #define TSCH_DEBUG_SLOT_END()
169 #endif /* TSCH_DEBUG */
170 
171 #ifndef BAUD2UBR
172 #define BAUD2UBR(X) (X)
173 #endif /* BAUD2UBR */
174 
175 /* UART baud rates */
176 #define UART_RATE_4800 0
177 #define UART_RATE_9600 1
178 #define UART_RATE_19200 2
179 #define UART_RATE_38400 3
180 #define UART_RATE_76800 4
181 #define UART_RATE_115200 5
182 #define UART_RATE_230400 6
183 #define UART_RATE_460800 7
184 #define UART_RATE_500000 8
185 #define UART_RATE_576000 9
186 #define UART_RATE_921600 10
187 #define UART_RATE_1000000 11
188 
189 #define PLATFORM_HAS_LEDS 1
190 #define PLATFORM_HAS_BUTTON (SENSOR_BOARD_DR1174 == 1)
191 #define PLATFORM_HAS_LIGHT (SENSOR_BOARD_DR1175 == 1)
192 #define PLATFORM_HAS_HT (SENSOR_BOARD_DR1175 == 1)
193 #define PLATFORM_HAS_POT (SENSOR_BOARD_DR1199 == 1)
194 #define PLATFORM_HAS_BATTERY 0 /* sensor driver not implemented */
195 #define PLATFORM_HAS_SHT11 0
196 #define PLATFORM_HAS_RADIO 1
197 
198 /* CPU target speed in Hz
199  * RTIMER and peripherals clock is F_CPU/2 */
200 #define F_CPU 32000000UL
201 
202 /* LED ports */
203 /*
204  #define LEDS_PxDIR P5DIR
205  #define LEDS_PxOUT P5OUT
206  #define LEDS_CONF_RED 0x10
207  #define LEDS_CONF_GREEN 0x20
208  #define LEDS_CONF_YELLOW 0x40
209  #define JENNIC_CONF_BUTTON_PIN (IRQ_DIO9|IRQ_DIO10)
210  */
211 
212 #define CC_CONF_REGISTER_ARGS 1
213 #define CC_CONF_FUNCTION_POINTER_ARGS 1
214 #define CC_CONF_VA_ARGS 1
215 #define CC_CONF_INLINE inline
216 
217 #define CCIF
218 #define CLIF
219 
220 #ifdef HAVE_STDINT_H
221 #include <stdint.h>
222 #else
223 #ifndef uint8_t
224 typedef unsigned char uint8_t;
225 typedef unsigned short uint16_t;
226 typedef unsigned long uint32_t;
227 typedef signed char int8_t;
228 typedef short int16_t;
229 typedef long int32_t;
230 typedef unsigned long long uint64_t;
231 typedef long long int64_t;
232 #endif
233 #endif /* !HAVE_STDINT_H */
234 
235 /* Types for clocks and uip_stats */
236 typedef uint16_t uip_stats_t;
237 typedef uint32_t clock_time_t;
238 
239 /* Shall we calibrate the DCO periodically? */
240 #ifndef DCOSYNCH_CONF_ENABLED
241 #define DCOSYNCH_CONF_ENABLED 1
242 #endif
243 
244 /* How often shall we attempt to calibrate DCO?
245  * PS: It should be calibrated upon temperature changes,
246  * but the naive approach of periodic calibration is fine too */
247 #ifndef DCOSYNCH_PERIOD
248 #define DCOSYNCH_PERIOD (5 * 60)
249 #endif /* VCO_CALIBRATION_INTERVAL */
250 
251 /* Disable UART HW flow control */
252 #ifndef UART_HW_FLOW_CTRL
253 #define UART_HW_FLOW_CTRL 0
254 #endif /* UART_HW_FLOW_CTRL */
255 
256 /* Disable UART SW flow control */
257 #ifndef UART_XONXOFF_FLOW_CTRL
258 #define UART_XONXOFF_FLOW_CTRL 1
259 #endif /* UART_XONXOFF_FLOW_CTRL */
260 
261 #ifndef UART_BAUD_RATE
262 #define UART_BAUD_RATE UART_RATE_1000000
263 #endif /* UART_BAUD_RATE */
264 
265 #ifndef UART1_BAUD_RATE
266 #define UART1_BAUD_RATE UART_RATE_1000000
267 #endif
268 #define ENABLE_ADVANCED_BAUD_SELECTION (UART_BAUD_RATE > UART_RATE_115200)
269 
270 /* Set this to zero only if we are using SLIP */
271 #ifndef SLIP_BRIDGE_CONF_NO_PUTCHAR
272 #define SLIP_BRIDGE_CONF_NO_PUTCHAR 1
273 #endif /* SLIP_BRIDGE_CONF_NO_PUTCHAR */
274 
275 /* Extension of LED definitions from leds.h for various JN516x dev boards
276 JN516x Dongle:
277  LEDS_RED Red LED on dongle
278  LEDS_GREEN Green LED on dongle
279  Note: Only one LED can be switch on at the same time
280 
281 DR1174-only:
282  LEDS_GP0 LED D3 on DR1174
283  LEDS_GP1 LED D6 on DR1174
284 
285 DR1174+DR1199:
286  LEDS_RED LED D1 on DR1199
287  LEDS_GREEN LED D2 on DR1199
288  LEDS_BLUE LED D3 on DR1199
289  LEDS_GP0 LED D3 on DR1174
290  LEDS_GP1 LED D6 on DR1174
291 
292 DR1174+DR1175:
293  LEDS_RED Red led in RGB-led with level control on DR1175
294  LEDS_GREEN Green led in RGB-led with level control on DR1175
295  LEDS_BLUE Blue led in RGB-led with level control on DR1175
296  LEDS_WHITE White power led with level control on DR1175
297  LEDS_GP0 LEDS D3 on DR1174
298  LEDS_GP1 LEDS D6 on DR1174
299 */
300 #define LEDS_WHITE 8
301 #define LEDS_GP0 16
302 #define LEDS_GP1 32
303 #define LEDS_GP2 64
304 #define LEDS_GP3 128
305 #define LEDS_CONF_ALL 255
306 #endif /* PLATFORM_CONF_H */