Contiki 3.x
galileo-pinmux.c
1 /*
2  * Copyright (C) 2015-2016, Intel Corporation. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  * 1. Redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution.
12  *
13  * 3. Neither the name of the copyright holder nor the names of its
14  * contributors may be used to endorse or promote products derived
15  * from this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
20  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
21  * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
23  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
24  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
26  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
28  * OF THE POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #include "galileo-pinmux.h"
32 #include "gpio.h"
33 #include "gpio-pcal9535a.h"
34 #include "i2c.h"
35 #include "pwm-pca9685.h"
36 
37 #define GPIO_PCAL9535A_0_I2C_ADDR 0x25
38 #define GPIO_PCAL9535A_1_I2C_ADDR 0x26
39 #define GPIO_PCAL9535A_2_I2C_ADDR 0x27
40 #define PWM_PCA9685_0_I2C_ADDR 0x47
41 
42 #define PINMUX_NUM_FUNCS 4
43 #define PINMUX_NUM_PATHS 4
44 #define PINMUX_NUM_PINS 20
45 
46 typedef enum {
47  NONE,
48  EXP0,
49  EXP1,
50  EXP2,
51  PWM0
52 } MUX_CHIP;
53 
54 typedef enum {
55  PIN_LOW = 0x00,
56  PIN_HIGH = 0x01,
57  DISABLED = 0xFF
58 } PIN_LEVEL;
59 
60 struct pin_config {
61  uint8_t pin_num;
62  GALILEO_PINMUX_FUNC func;
63 };
64 
65 static struct pin_config default_pinmux_config[PINMUX_NUM_PINS] = {
66  { 0, GALILEO_PINMUX_FUNC_C }, /* UART0_RXD */
67  { 1, GALILEO_PINMUX_FUNC_C }, /* UART0_TXD */
68  { 2, GALILEO_PINMUX_FUNC_A }, /* GPIO5(out) */
69  { 3, GALILEO_PINMUX_FUNC_B }, /* GPIO6(in) */
70  { 4, GALILEO_PINMUX_FUNC_B }, /* GPIO_SUS4 (in) */
71  { 5, GALILEO_PINMUX_FUNC_B }, /* GPIO8 (in) */
72  { 6, GALILEO_PINMUX_FUNC_B }, /* GPIO9 (in) */
73  { 7, GALILEO_PINMUX_FUNC_B }, /* EXP1.P0_6 (in) */
74  { 8, GALILEO_PINMUX_FUNC_B }, /* EXP1.P1_0 (in) */
75  { 9, GALILEO_PINMUX_FUNC_B }, /* GPIO_SUS2 (in) */
76  { 10, GALILEO_PINMUX_FUNC_A }, /* GPIO2 (out) */
77  { 11, GALILEO_PINMUX_FUNC_B }, /* GPIO_SUS3 (in) */
78  { 12, GALILEO_PINMUX_FUNC_B }, /* GPIO7 (in) */
79  { 13, GALILEO_PINMUX_FUNC_B }, /* GPIO_SUS5(in) */
80  { 14, GALILEO_PINMUX_FUNC_B }, /* EXP2.P0_0 (in)/ADC.IN0 */
81  { 15, GALILEO_PINMUX_FUNC_B }, /* EXP2.P0_2 (in)/ADC.IN1 */
82  { 16, GALILEO_PINMUX_FUNC_B }, /* EXP2.P0_4 (in)/ADC.IN2 */
83  { 17, GALILEO_PINMUX_FUNC_B }, /* EXP2.P0_6 (in)/ADC.IN3 */
84  { 18, GALILEO_PINMUX_FUNC_C }, /* I2C_SDA */
85  { 19, GALILEO_PINMUX_FUNC_C }, /* I2C_SCL */
86 };
87 
88 struct mux_pin {
89  MUX_CHIP chip;
90  uint8_t pin;
91  PIN_LEVEL level;
92  uint32_t cfg;
93 };
94 
95 struct mux_path {
96  uint8_t io_pin;
97  GALILEO_PINMUX_FUNC func;
98  struct mux_pin path[PINMUX_NUM_PATHS];
99 };
100 
101 struct pinmux_internal_data {
102  struct gpio_pcal9535a_data exp0;
103  struct gpio_pcal9535a_data exp1;
104  struct gpio_pcal9535a_data exp2;
105  struct pwm_pca9685_data pwm0;
106 };
107 
108 static struct pinmux_internal_data data;
109 
110 static struct mux_path galileo_pinmux_paths[PINMUX_NUM_PINS * PINMUX_NUM_FUNCS] = {
111  {0, GALILEO_PINMUX_FUNC_A, {
112  { EXP1, 0, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* GPIO3 out */
113  { EXP1, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) },
114  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
115  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
116  {0, GALILEO_PINMUX_FUNC_B, {
117  { EXP1, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO3 in */
118  { EXP1, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) },
119  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
120  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
121  {0, GALILEO_PINMUX_FUNC_C, {
122  { EXP1, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* UART0_RXD */
123  { EXP1, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) },
124  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
125  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
126  {0, GALILEO_PINMUX_FUNC_D, {
127  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
128  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
129  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
130  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
131 
132  {1, GALILEO_PINMUX_FUNC_A, {
133  { EXP1, 13, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO4 out */
134  { EXP0, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) },
135  { EXP0, 13, PIN_LOW, (QUARKX1000_GPIO_OUT) },
136  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
137  {1, GALILEO_PINMUX_FUNC_B, {
138  { EXP1, 13, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO4 in */
139  { EXP0, 12, PIN_HIGH, (QUARKX1000_GPIO_OUT)},
140  { EXP0, 13, PIN_LOW, (QUARKX1000_GPIO_OUT) },
141  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
142  {1, GALILEO_PINMUX_FUNC_C, {
143  { EXP1, 13, PIN_HIGH, (QUARKX1000_GPIO_OUT)}, /* UART0_TXD */
144  { EXP0, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) },
145  { EXP0, 13, PIN_LOW, (QUARKX1000_GPIO_OUT) },
146  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
147  {1, GALILEO_PINMUX_FUNC_D, {
148  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
149  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
150  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
151  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
152 
153  {2, GALILEO_PINMUX_FUNC_A, {
154  { PWM0, 13, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* GPIO5 out */
155  { EXP1, 2, PIN_LOW, (QUARKX1000_GPIO_OUT) },
156  { EXP1, 3, PIN_LOW, (QUARKX1000_GPIO_OUT) },
157  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
158  {2, GALILEO_PINMUX_FUNC_B, {
159  { PWM0, 13, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* GPIO5 in */
160  { EXP1, 2, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
161  { EXP1, 3, PIN_LOW, (QUARKX1000_GPIO_OUT) },
162  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
163  {2, GALILEO_PINMUX_FUNC_C, {
164  { PWM0, 13, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* UART1_RXD */
165  { EXP1, 2, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
166  { EXP1, 3, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
167  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
168  {2, GALILEO_PINMUX_FUNC_D, {
169  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
170  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
171  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
172  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
173 
174  {3, GALILEO_PINMUX_FUNC_A, {
175  { PWM0, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO6 out */
176  { PWM0, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) },
177  { EXP0, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) },
178  { EXP0, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
179  {3, GALILEO_PINMUX_FUNC_B, {
180  { PWM0, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO6 in */
181  { PWM0, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) },
182  { EXP0, 0, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
183  { EXP0, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
184  {3, GALILEO_PINMUX_FUNC_C, {
185  { PWM0, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* UART1_TXD */
186  { PWM0, 12, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
187  { EXP0, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) },
188  { EXP0, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
189  {3, GALILEO_PINMUX_FUNC_D, {
190  { PWM0, 0, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* PWM.LED1 */
191  { PWM0, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) },
192  { EXP0, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) },
193  { EXP0, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
194 
195  {4, GALILEO_PINMUX_FUNC_A, {
196  { EXP1, 4, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS4 out */
197  { EXP1, 5, PIN_LOW, (QUARKX1000_GPIO_OUT) },
198  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
199  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
200  {4, GALILEO_PINMUX_FUNC_B, {
201  { EXP1, 4, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS4 in */
202  { EXP1, 5, PIN_LOW, (QUARKX1000_GPIO_OUT) },
203  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
204  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
205  {4, GALILEO_PINMUX_FUNC_C, {
206  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
207  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
208  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
209  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
210  {4, GALILEO_PINMUX_FUNC_D, {
211  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
212  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
213  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
214  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
215 
216  {5, GALILEO_PINMUX_FUNC_A, {
217  { PWM0, 2, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO8 (out) */
218  { EXP0, 2, PIN_LOW, (QUARKX1000_GPIO_OUT) },
219  { EXP0, 3, PIN_LOW, (QUARKX1000_GPIO_OUT) },
220  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
221  {5, GALILEO_PINMUX_FUNC_B, {
222  { PWM0, 2, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO8 (in) */
223  { EXP0, 2, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
224  { EXP0, 3, PIN_LOW, (QUARKX1000_GPIO_OUT) },
225  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
226  {5, GALILEO_PINMUX_FUNC_C, {
227  { PWM0, 2, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* PWM.LED3 */
228  { EXP0, 2, PIN_LOW, (QUARKX1000_GPIO_OUT) },
229  { EXP0, 3, PIN_LOW, (QUARKX1000_GPIO_OUT) },
230  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
231  {5, GALILEO_PINMUX_FUNC_D, {
232  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
233  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
234  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
235  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
236 
237  {6, GALILEO_PINMUX_FUNC_A, {
238  { PWM0, 4, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO9 (out) */
239  { EXP0, 4, PIN_LOW, (QUARKX1000_GPIO_OUT) },
240  { EXP0, 5, PIN_LOW, (QUARKX1000_GPIO_OUT) },
241  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
242  {6, GALILEO_PINMUX_FUNC_B, {
243  { PWM0, 4, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO9 (in) */
244  { EXP0, 4, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
245  { EXP0, 5, PIN_LOW, (QUARKX1000_GPIO_OUT) },
246  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
247  {6, GALILEO_PINMUX_FUNC_C, {
248  { PWM0, 4, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* PWM.LED5 */
249  { EXP0, 4, PIN_LOW, (QUARKX1000_GPIO_OUT) },
250  { EXP0, 5, PIN_LOW, (QUARKX1000_GPIO_OUT) },
251  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
252  {6, GALILEO_PINMUX_FUNC_D, {
253  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
254  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
255  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
256  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
257 
258  {7, GALILEO_PINMUX_FUNC_A, {
259  { EXP1, 6, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS0 (out) */
260  { EXP1, 7, PIN_LOW, (QUARKX1000_GPIO_OUT) },
261  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
262  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
263  {7, GALILEO_PINMUX_FUNC_B, {
264  { EXP1, 6, PIN_LOW, (QUARKX1000_GPIO_IN ) }, /* GPIO_SUS0 (in) */
265  { EXP1, 7, PIN_LOW, (QUARKX1000_GPIO_OUT) },
266  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
267  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
268  {7, GALILEO_PINMUX_FUNC_C, {
269  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
270  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
271  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
272  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
273  {7, GALILEO_PINMUX_FUNC_D, {
274  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
275  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
276  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
277  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
278 
279  {8, GALILEO_PINMUX_FUNC_A, {
280  { EXP1, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS1 (out) */
281  { EXP1, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) },
282  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
283  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
284  {8, GALILEO_PINMUX_FUNC_B, {
285  { EXP1, 8, PIN_LOW, (QUARKX1000_GPIO_IN ) }, /* GPIO_SUS1 (in) */
286  { EXP1, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) },
287  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
288  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
289  {8, GALILEO_PINMUX_FUNC_C, {
290  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
291  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
292  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
293  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
294  {8, GALILEO_PINMUX_FUNC_D, {
295  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
296  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
297  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
298  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
299 
300  {9, GALILEO_PINMUX_FUNC_A, {
301  { PWM0, 6, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS2 (out) */
302  { EXP0, 6, PIN_LOW, (QUARKX1000_GPIO_OUT) },
303  { EXP0, 7, PIN_LOW, (QUARKX1000_GPIO_OUT) },
304  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
305  {9, GALILEO_PINMUX_FUNC_B, {
306  { PWM0, 6, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS2 (in) */
307  { EXP0, 6, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
308  { EXP0, 7, PIN_LOW, (QUARKX1000_GPIO_OUT) },
309  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
310  {9, GALILEO_PINMUX_FUNC_C, {
311  { PWM0, 6, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* PWM.LED7 */
312  { EXP0, 6, PIN_LOW, (QUARKX1000_GPIO_OUT) },
313  { EXP0, 7, PIN_LOW, (QUARKX1000_GPIO_OUT) },
314  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
315  {9, GALILEO_PINMUX_FUNC_C, {
316  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
317  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
318  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
319  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
320 
321  {10, GALILEO_PINMUX_FUNC_A, {
322  { PWM0, 10, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO2 (out) */
323  { EXP0, 10, PIN_LOW, (QUARKX1000_GPIO_OUT) },
324  { EXP0, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) },
325  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
326  {10, GALILEO_PINMUX_FUNC_B, {
327  { PWM0, 10, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO2 (in) */
328  { EXP0, 10, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
329  { EXP0, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) },
330  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
331  {10, GALILEO_PINMUX_FUNC_C, {
332  { PWM0, 10, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* PWM.LED11 */
333  { EXP0, 10, PIN_LOW, (QUARKX1000_GPIO_OUT) },
334  { EXP0, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) },
335  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
336  {10, GALILEO_PINMUX_FUNC_D, {
337  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
338  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
339  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
340  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
341 
342  {11, GALILEO_PINMUX_FUNC_A, {
343  { EXP1, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS3 (out) */
344  { PWM0, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) },
345  { EXP0, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) },
346  { EXP0, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
347  {11, GALILEO_PINMUX_FUNC_B, {
348  { EXP1, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS3 (in) */
349  { PWM0, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) },
350  { EXP0, 8, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
351  { EXP0, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
352  {11, GALILEO_PINMUX_FUNC_C, {
353  { EXP1, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* PWM.LED9 */
354  { PWM0, 8, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
355  { EXP0, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) },
356  { EXP0, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
357  {11, GALILEO_PINMUX_FUNC_D, {
358  { EXP1, 12, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* SPI1_MOSI */
359  { PWM0, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) },
360  { EXP0, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) },
361  { EXP0, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
362 
363  {12, GALILEO_PINMUX_FUNC_A, {
364  { EXP1, 10, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO7 (out) */
365  { EXP1, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) },
366  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
367  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
368  {12, GALILEO_PINMUX_FUNC_B, {
369  { EXP1, 10, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* GPIO7 (in) */
370  { EXP1, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) },
371  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
372  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
373  {12, GALILEO_PINMUX_FUNC_C, {
374  { EXP1, 10, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* SPI1_MISO */
375  { EXP1, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) },
376  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
377  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
378  {12, GALILEO_PINMUX_FUNC_D, {
379  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
380  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
381  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
382  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
383 
384  {13, GALILEO_PINMUX_FUNC_A, {
385  { EXP1, 14, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS5 (out) */
386  { EXP0, 14, PIN_LOW, (QUARKX1000_GPIO_OUT) },
387  { EXP0, 15, PIN_LOW, (QUARKX1000_GPIO_OUT) },
388  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
389  {13, GALILEO_PINMUX_FUNC_B, {
390  { EXP1, 14, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS5 (in) */
391  { EXP0, 14, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
392  { EXP0, 15, PIN_LOW, (QUARKX1000_GPIO_OUT) },
393  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
394  {13, GALILEO_PINMUX_FUNC_C, {
395  { EXP1, 14, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* SPI1_CLK */
396  { EXP0, 14, PIN_LOW, (QUARKX1000_GPIO_OUT) },
397  { EXP0, 15, PIN_LOW, (QUARKX1000_GPIO_OUT) },
398  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
399  {13, GALILEO_PINMUX_FUNC_D, {
400  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
401  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
402  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
403  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
404 
405  {14, GALILEO_PINMUX_FUNC_A, {
406  { EXP2, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* EXP2.P0_0 (out)/ADC.IN0 */
407  { EXP2, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) },
408  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
409  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
410  {14, GALILEO_PINMUX_FUNC_B, {
411  { EXP2, 0, PIN_LOW, (QUARKX1000_GPIO_IN ) }, /* EXP2.P0_0 (in)/ADC.IN0 */
412  { EXP2, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) },
413  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
414  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
415  {14, GALILEO_PINMUX_FUNC_C, {
416  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
417  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
418  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
419  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
420  {14, GALILEO_PINMUX_FUNC_D, {
421  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
422  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
423  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
424  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
425 
426  {15, GALILEO_PINMUX_FUNC_A, {
427  { EXP2, 2, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* EXP2.P0_2 (out)/ADC.IN1 */
428  { EXP2, 3, PIN_LOW, (QUARKX1000_GPIO_OUT) },
429  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
430  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
431  {15, GALILEO_PINMUX_FUNC_B, {
432  { EXP2, 2, PIN_LOW, (QUARKX1000_GPIO_IN ) }, /* EXP2.P0_2 (in)/ADC.IN1 */
433  { EXP2, 3, PIN_LOW, (QUARKX1000_GPIO_OUT) },
434  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
435  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
436  {15, GALILEO_PINMUX_FUNC_C, {
437  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
438  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
439  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
440  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
441  {15, GALILEO_PINMUX_FUNC_D, {
442  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
443  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
444  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
445  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
446 
447  {16, GALILEO_PINMUX_FUNC_A, {
448  { EXP2, 4, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* EXP2.P0_4 (out)/ADC.IN2 */
449  { EXP2, 5, PIN_LOW, (QUARKX1000_GPIO_OUT) },
450  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
451  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
452  {16, GALILEO_PINMUX_FUNC_B, {
453  { EXP2, 4, PIN_LOW, (QUARKX1000_GPIO_IN ) }, /* EXP2.P0_4 (in)/ADC.IN2 */
454  { EXP2, 5, PIN_LOW, (QUARKX1000_GPIO_OUT) },
455  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
456  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
457  {16, GALILEO_PINMUX_FUNC_C, {
458  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
459  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
460  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
461  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
462  {16, GALILEO_PINMUX_FUNC_D, {
463  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
464  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
465  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
466  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
467 
468  {17, GALILEO_PINMUX_FUNC_A, {
469  { EXP2, 6, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* EXP2.P0_6 (out)/ADC.IN3 */
470  { EXP2, 7, PIN_LOW, (QUARKX1000_GPIO_OUT) },
471  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
472  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
473  {17, GALILEO_PINMUX_FUNC_B, {
474  { EXP2, 6, PIN_LOW, (QUARKX1000_GPIO_IN ) }, /* EXP2.P0_6 (in)/ADC.IN3 */
475  { EXP2, 7, PIN_LOW, (QUARKX1000_GPIO_OUT) },
476  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
477  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
478  {17, GALILEO_PINMUX_FUNC_C, {
479  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
480  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
481  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
482  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
483  {17, GALILEO_PINMUX_FUNC_D, {
484  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
485  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
486  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
487  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
488 
489  {18, GALILEO_PINMUX_FUNC_A, {
490  { PWM0, 14, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* EXP2.P1_0 (out)/ADC.IN4 */
491  { EXP2, 12, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
492  { EXP2, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) },
493  { EXP2, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
494  {18, GALILEO_PINMUX_FUNC_B, {
495  { PWM0, 14, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* EXP2.P1_0 (in)/ADC.IN4 */
496  { EXP2, 12, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
497  { EXP2, 8, PIN_LOW, (QUARKX1000_GPIO_IN ) },
498  { EXP2, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
499  {18, GALILEO_PINMUX_FUNC_C, {
500  { PWM0, 14, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* I2C SDA */
501  { EXP2, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) },
502  { EXP2, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) },
503  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
504  {18, GALILEO_PINMUX_FUNC_D, {
505  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
506  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
507  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
508  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
509 
510  {19, GALILEO_PINMUX_FUNC_A, {
511  { PWM0, 15, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* EXP2.P1_2 (out)/ADC.IN5 */
512  { EXP2, 12, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
513  { EXP2, 10, PIN_LOW, (QUARKX1000_GPIO_OUT) },
514  { EXP2, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
515  {19, GALILEO_PINMUX_FUNC_B, {
516  { PWM0, 15, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* EXP2.P1_2 (in)/ADC.IN5 */
517  { EXP2, 12, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
518  { EXP2, 10, PIN_LOW, (QUARKX1000_GPIO_IN ) },
519  { EXP2, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
520  {19, GALILEO_PINMUX_FUNC_C, {
521  { PWM0, 15, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* I2C SCL */
522  { EXP2, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) },
523  { EXP2, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) },
524  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
525  {19, GALILEO_PINMUX_FUNC_D, {
526  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
527  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
528  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
529  { NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
530 };
531 
532 int
533 galileo_pinmux_set_pin(uint8_t pin, GALILEO_PINMUX_FUNC func)
534 {
535  struct mux_path *mux_path;
536  uint8_t index, i;
537 
538  if(pin > PINMUX_NUM_PINS) {
539  return -1;
540  }
541 
542  index = PINMUX_NUM_FUNCS * pin;
543  index += func;
544 
545  mux_path = &galileo_pinmux_paths[index];
546 
547  for(i = 0; i < PINMUX_NUM_PATHS; i++) {
548  switch(mux_path->path[i].chip) {
549  case EXP0:
550  if(gpio_pcal9535a_write(&data.exp0, mux_path->path[i].pin, mux_path->path[i].level) < 0) {
551  return -1;
552  }
553  if(gpio_pcal9535a_config(&data.exp0, mux_path->path[i].pin, mux_path->path[i].cfg) < 0) {
554  return -1;
555  }
556  break;
557  case EXP1:
558  if(gpio_pcal9535a_write(&data.exp1, mux_path->path[i].pin, mux_path->path[i].level) < 0) {
559  return -1;
560  }
561  if(gpio_pcal9535a_config(&data.exp1, mux_path->path[i].pin, mux_path->path[i].cfg) < 0) {
562  return -1;
563  }
564  break;
565  case EXP2:
566  if(gpio_pcal9535a_write(&data.exp2, mux_path->path[i].pin, mux_path->path[i].level) < 0) {
567  return -1;
568  }
569  if(gpio_pcal9535a_config(&data.exp2, mux_path->path[i].pin, mux_path->path[i].cfg) < 0) {
570  return -1;
571  }
572  break;
573  case PWM0:
574  if(pwm_pca9685_set_duty_cycle(&data.pwm0, mux_path->path[i].pin, mux_path->path[i].level ? 100 : 0) < 0) {
575  return -1;
576  }
577  break;
578  case NONE:
579  break;
580  }
581  }
582 
583  return 0;
584 }
585 int
586 galileo_pinmux_initialize(void)
587 {
588  uint8_t i;
589 
590  /* has to init after I2C master */
591  if(!quarkX1000_i2c_is_available()) {
592  return -1;
593  }
594 
595  if(gpio_pcal9535a_init(&data.exp0, GPIO_PCAL9535A_0_I2C_ADDR) < 0) {
596  return -1;
597  }
598 
599  if(gpio_pcal9535a_init(&data.exp1, GPIO_PCAL9535A_1_I2C_ADDR) < 0) {
600  return -1;
601  }
602 
603  if(gpio_pcal9535a_init(&data.exp2, GPIO_PCAL9535A_2_I2C_ADDR) < 0) {
604  return -1;
605  }
606 
607  if(pwm_pca9685_init(&data.pwm0, PWM_PCA9685_0_I2C_ADDR) < 0) {
608  return -1;
609  }
610 
611  for(i = 0; i < PINMUX_NUM_PINS; i++) {
612  if(galileo_pinmux_set_pin(default_pinmux_config[i].pin_num, default_pinmux_config[i].func) < 0) {
613  return -1;
614  }
615  }
616 
617  return 0;
618 }
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