46 #include "contiki-net.h"
57 #define CC1200_SPI_CLK_PORT_BASE GPIO_PORT_TO_BASE(SPI0_CLK_PORT)
58 #define CC1200_SPI_CLK_PIN_MASK GPIO_PIN_MASK(SPI0_CLK_PIN)
59 #define CC1200_SPI_MOSI_PORT_BASE GPIO_PORT_TO_BASE(SPI0_TX_PORT)
60 #define CC1200_SPI_MOSI_PIN_MASK GPIO_PIN_MASK(SPI0_TX_PIN)
61 #define CC1200_SPI_MISO_PORT_BASE GPIO_PORT_TO_BASE(SPI0_RX_PORT)
62 #define CC1200_SPI_MISO_PIN_MASK GPIO_PIN_MASK(SPI0_RX_PIN)
63 #define CC1200_SPI_CSN_PORT_BASE GPIO_PORT_TO_BASE(CC1200_SPI_CSN_PORT)
64 #define CC1200_SPI_CSN_PIN_MASK GPIO_PIN_MASK(CC1200_SPI_CSN_PIN)
65 #define CC1200_GDO0_PORT_BASE GPIO_PORT_TO_BASE(CC1200_GDO0_PORT)
66 #define CC1200_GDO0_PIN_MASK GPIO_PIN_MASK(CC1200_GDO0_PIN)
67 #define CC1200_GDO2_PORT_BASE GPIO_PORT_TO_BASE(CC1200_GDO2_PORT)
68 #define CC1200_GDO2_PIN_MASK GPIO_PIN_MASK(CC1200_GDO2_PIN)
69 #define CC1200_RESET_PORT_BASE GPIO_PORT_TO_BASE(CC1200_RESET_PORT)
70 #define CC1200_RESET_PIN_MASK GPIO_PIN_MASK(CC1200_RESET_PIN)
72 #ifndef DEBUG_CC1200_ARCH
73 #define DEBUG_CC1200_ARCH 0
76 #if DEBUG_CC1200_ARCH > 0
77 #define PRINTF(...) printf(__VA_ARGS__)
78 #define BUSYWAIT_UNTIL(cond, max_time) \
82 while(!(cond) && RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + (max_time))) {} \
83 if(!(RTIMER_CLOCK_LT(RTIMER_NOW(), t0 + (max_time)))) { \
84 printf("ARCH: Timeout exceeded in line %d!\n", __LINE__); \
89 #define BUSYWAIT_UNTIL(cond, max_time) while(!cond)
92 extern int cc1200_rx_interrupt(
void);
95 cc1200_int_handler(uint8_t port, uint8_t pin)
98 cc1200_rx_interrupt();
102 cc1200_arch_spi_select(
void)
105 GPIO_CLR_PIN(CC1200_SPI_CSN_PORT_BASE, CC1200_SPI_CSN_PIN_MASK);
108 GPIO_READ_PIN(CC1200_SPI_MISO_PORT_BASE, CC1200_SPI_MISO_PIN_MASK) == 0,
109 RTIMER_SECOND / 100);
113 cc1200_arch_spi_deselect(
void)
116 GPIO_SET_PIN(CC1200_SPI_CSN_PORT_BASE, CC1200_SPI_CSN_PIN_MASK);
120 cc1200_arch_spi_rw_byte(uint8_t c)
122 SPI_WAITFORTx_BEFORE();
123 SPIX_BUF(CC1200_SPI_INSTANCE) = c;
124 SPIX_WAITFOREOTx(CC1200_SPI_INSTANCE);
125 SPIX_WAITFOREORx(CC1200_SPI_INSTANCE);
126 c = SPIX_BUF(CC1200_SPI_INSTANCE);
132 cc1200_arch_spi_rw(uint8_t *inbuf,
const uint8_t *write_buf, uint16_t len)
137 if((inbuf ==
NULL && write_buf ==
NULL) || len <= 0) {
139 }
else if(inbuf ==
NULL) {
140 for(i = 0; i < len; i++) {
141 SPI_WAITFORTx_BEFORE();
142 SPIX_BUF(CC1200_SPI_INSTANCE) = write_buf[i];
143 SPIX_WAITFOREOTx(CC1200_SPI_INSTANCE);
144 SPIX_WAITFOREORx(CC1200_SPI_INSTANCE);
145 c = SPIX_BUF(CC1200_SPI_INSTANCE);
149 }
else if(write_buf ==
NULL) {
150 for(i = 0; i < len; i++) {
151 SPI_WAITFORTx_BEFORE();
152 SPIX_BUF(CC1200_SPI_INSTANCE) = 0;
153 SPIX_WAITFOREOTx(CC1200_SPI_INSTANCE);
154 SPIX_WAITFOREORx(CC1200_SPI_INSTANCE);
155 inbuf[i] = SPIX_BUF(CC1200_SPI_INSTANCE);
158 for(i = 0; i < len; i++) {
159 SPI_WAITFORTx_BEFORE();
160 SPIX_BUF(CC1200_SPI_INSTANCE) = write_buf[i];
161 SPIX_WAITFOREOTx(CC1200_SPI_INSTANCE);
162 SPIX_WAITFOREORx(CC1200_SPI_INSTANCE);
163 inbuf[i] = SPIX_BUF(CC1200_SPI_INSTANCE);
170 cc1200_arch_gpio0_setup_irq(
int rising)
192 cc1200_arch_gpio2_setup_irq(
int rising)
214 cc1200_arch_gpio0_enable_irq(
void)
222 cc1200_arch_gpio0_disable_irq(
void)
228 cc1200_arch_gpio2_enable_irq(
void)
236 cc1200_arch_gpio2_disable_irq(
void)
242 cc1200_arch_gpio0_read_pin(
void)
244 return GPIO_READ_PIN(CC1200_GDO0_PORT_BASE, CC1200_GDO0_PIN_MASK);
248 cc1200_arch_gpio2_read_pin(
void)
250 return GPIO_READ_PIN(CC1200_GDO2_PORT_BASE, CC1200_GDO2_PIN_MASK);
254 cc1200_arch_gpio3_read_pin(
void)
260 cc1200_arch_init(
void)
266 GPIO_SET_PIN(CC1200_RESET_PORT_BASE, CC1200_RESET_PIN_MASK);
281 cc1200_arch_spi_deselect();
285 GPIO_READ_PIN(CC1200_SPI_MISO_PORT_BASE, CC1200_SPI_MISO_PIN_MASK),
#define GPIO_TRIGGER_SINGLE_EDGE(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to trigger an interrupt on single edge (controlled by G...
#define GPIO_ENABLE_INTERRUPT(PORT_BASE, PIN_MASK)
Enable interrupt triggering for pins with PIN_MASK of port with PORT_BASE.
#define GPIO_SET_INPUT(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to input.
Header file with register manipulation macro definitions.
#define IOC_OVERRIDE_PUE
Pull Up Enable.
Header file for the cc2538 SPI driver, including macros for the implementation of the low-level SPI p...
#define GPIO_DETECT_EDGE(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to detect edge.
#define IOC_OVERRIDE_OE
Output Enable.
#define GPIO_DETECT_FALLING(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to trigger an interrupt on falling edge.
void spix_init(uint8_t spi)
Initialize the SPI bus for the instance given.
#define GPIO_READ_PIN(PORT_BASE, PIN_MASK)
Read pins with PIN_MASK of port with PORT_BASE.
#define GPIO_CLR_PIN(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE low.
#define GPIO_SET_PIN(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE high.
void spix_cs_init(uint8_t port, uint8_t pin)
Configure a GPIO to be the chip select pin.
#define GPIO_SET_OUTPUT(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to output.
#define NULL
The null pointer.
Header file with declarations for the I/O Control module.
#define GPIO_SOFTWARE_CONTROL(PORT_BASE, PIN_MASK)
Configure the pin to be software controlled with PIN_MASK of port with PORT_BASE. ...
Header file for the cc2538 System Control driver.
Header file for the cc2538 Synchronous Serial Interface.
#define GPIO_DETECT_RISING(PORT_BASE, PIN_MASK)
Set pins with PIN_MASK of port with PORT_BASE to trigger an interrupt on rising edge.
void nvic_interrupt_enable(uint32_t intr)
Enables interrupt intr.
#define GPIO_DISABLE_INTERRUPT(PORT_BASE, PIN_MASK)
Disable interrupt triggering for pins with PIN_MASK of port with PORT_BASE.
void ioc_set_over(uint8_t port, uint8_t pin, uint8_t over)
Set Port:Pin override function.
void gpio_register_callback(gpio_callback_t f, uint8_t port, uint8_t pin)
Register GPIO callback.