Contiki 3.x
rtcc.h
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1 /*
2  * Copyright (c) 2015, Zolertia <http://www.zolertia.com>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  * 3. Neither the name of the Institute nor the names of its contributors
14  * may be used to endorse or promote products derived from this software
15  * without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  *
29  * This file is part of the Contiki operating system.
30  *
31  */
32 /* -------------------------------------------------------------------------- */
33 /**
34  * \addtogroup remote
35  * @{
36  *
37  * \defgroup remote-rtcc RE-Mote Real Time Clock Calendar
38  *
39  * Driver for the RE-Mote on-board ultra-low power RTCC (Real Time Clock
40  * Calendar)
41  * @{
42  *
43  * \file
44  * Header file for the RE-Mote RF antenna switch
45  */
46 /* -------------------------------------------------------------------------- */
47 #ifndef RTCC_H_
48 #define RTCC_H_
49 /* -------------------------------------------------------------------------- */
50 #include <stdio.h>
51 #include "i2c.h"
52 /* -------------------------------------------------------------------------- */
53 /**
54  * \name Callback function to handle the RTCC alarm interrupt and macro
55  * @{
56  */
57 #define RTCC_REGISTER_INT1(ptr) rtcc_int1_callback = ptr;
58 extern void (*rtcc_int1_callback)(uint8_t value);
59 /** @} */
60 /* -------------------------------------------------------------------------- */
61 /** \name AB08XX Address registers
62  * @{
63  */
64 /* -------------------------------------------------------------------------- */
65 /* Time/date registers (no offset) */
66 #define CENTHS_ADDR 0x00
67 #define SEC_ADDR 0x01
68 #define MIN_ADDR 0x02
69 #define HOUR_ADDR 0x03
70 #define DAY_ADDR 0x04
71 #define MONTHS_ADDR 0x05
72 #define YEAR_ADDR 0x06
73 #define WEEKDAYLS_ADDR 0x07
74 
75 /* Alarm registers */
76 #define ALARM_MAP_OFFSET 0x08
77 #define HUNDREDTHS_ALARM_ADDR 0x00
78 #define SECONDS_ALARM_ADDR 0x01
79 #define MINUTES_ALARM_ADDR 0x02
80 #define HOURS_ALARM_ADDR 0x03
81 #define DAY_ALARMS_ADDR 0x04
82 #define MONTHS_ALARM_ADDR 0x05
83 #define WEEKDAYS_ALARM_ADDR 0x06
84 
85 /* Configuration registers */
86 #define CONFIG_MAP_OFFSET 0x0F
87 #define STATUS_ADDR 0x00
88 #define CTRL_1_ADDR 0x01
89 #define CTRL_2_ADDR 0x02
90 #define INT_MASK_ADDR 0x03
91 #define SQW_ADDR 0x04
92 #define CAL_XT_ADDR 0x05
93 #define CAL_RC_HI_ADDR 0x06
94 #define CAL_RC_LO_ADDR 0x07
95 #define INT_POL_ADDR 0x08
96 #define TIMER_CONTROL_ADDR 0x09
97 #define TIMER_COUNTDOWN_ADDR 0x0A
98 #define TIMER_INITIAL_ADDR 0x0B
99 #define WDT_ADDR 0x0C
100 #define OSC_CONTROL_ADDR 0x0D
101 #define OSC_STATUS_ADDR 0x0E
102 #define CONF_KEY_ADDR 0x10
103 #define TRICKLE_ADDR 0x11
104 #define BREF_CTRL_ADDR 0x12
105 #define AF_CTRL_ADDR 0x17
106 #define BAT_MODE_IO_ADDR 0x18
107 #define ASTAT_ADDR 0x20
108 #define OCTRL_ADDR 0x21
109 #define EXT_ADDR 0x30
110 /* 256b. The upper 2 bits are taken from XADS field */
111 #define RAM_1_ADDR (CONFIG_MAP_OFFSET + 0x31)
112 /* 256b. The upper 2 bits are taken from XADA field */
113 #define RAM_2_ADDR (CONFIG_MAP_OFFSET + 0x71)
114 /** @} */
115 /* -------------------------------------------------------------------------- */
116 /** \name RTCC Bitmasks and shifts
117  * @{
118  */
119 #define STATUS_CB 0x80
120 #define STATUS_BAT 0x40
121 #define STATUS_WDT 0x20
122 #define STATUS_BL 0x10
123 #define STATUS_TIM 0x08
124 #define STATUS_ALM 0x04
125 #define STATUS_EX2 0x02
126 #define STATUS_EX1 0x01
127 
128 #define CTRL1_WRTC 0x01
129 #define CTRL1_ARST 0x04
130 #define CTRL1_OUT 0x10
131 #define CTRL1_OUTB 0x20
132 #define CTRL1_1224 0x40
133 #define CTRL1_STOP 0x80
134 
135 /* Defines the nIRQ pin control */
136 #define CTRL2_OUT1S_NIRQ_OUT 0x00
137 #define CTRL2_OUT1S_NIRQ_SQW_OUT 0x01
138 #define CTRL2_OUT1S_NIRQ_SQW_NIRQ 0x02
139 #define CTRL2_OUT1S_NIRQ_NAIRQ_OUT 0x03
140 
141 /* Defines the nIRQ2 pin control */
142 #define CTRL2_OUT2S_SQW_OUT 0x04
143 #define CTRL2_OUT2S_NAIRQ_OUTB 0x0C
144 #define CTRL2_OUT2S_TIRQ_OUTB 0x10
145 #define CTRL2_OUT2S_NTIRQ_OUTB 0x14
146 #define CTRL2_OUT2S_OUTB 0x1C
147 
148 /* Interrupt Mask */
149 #define INTMASK_EX1E 0x01
150 #define INTMASK_EX2E 0x02
151 #define INTMASK_AIE 0x04
152 #define INTMASK_TIE 0x08
153 #define INTMASK_BLIE 0x10
154 #define INTMASK_IM_HIGH 0x20
155 #define INTMASK_IM_MED 0x40
156 #define INTMASK_IM_LOW 0x60
157 #define INTMASK_CEB 0x80
158 
159 /* Timer countdown control */
160 #define COUNTDOWN_TIMER_TE 0x80
161 #define COUNTDOWN_TIMER_TM 0x40
162 #define COUNTDOWN_TIMER_TRPT 0x20
163 #define COUNTDOWN_TIMER_RPT_SECOND 0x1C
164 #define COUNTDOWN_TIMER_RPT_MINUTE 0x18
165 #define COUNTDOWN_TIMER_RPT_HOUR 0x24
166 #define COUNTDOWN_TIMER_RPT_DAY 0x10
167 #define COUNTDOWN_TIMER_RPT_WEEK 0x0C
168 #define COUNTDOWN_TIMER_RPT_MONTH 0x08
169 #define COUNTDOWN_TIMER_RPT_YEAR 0x04
170 #define COUNTDOWN_TIMER_RPT_SHIFT 0x02
171 #define COUNTDOWN_TIMER_TFS_ONE 0x01
172 #define COUNTDOWN_TIMER_TFS_TWO 0x02
173 #define COUNTDOWN_TIMER_TFS_THREE 0x03
174 
175 /* Oscillator control */
176 #define OSCONTROL_ACIE 0x01
177 #define OSCONTROL_OFIE 0x02
178 #define OSCONTROL_FOS 0x08
179 #define OSCONTROL_AOS 0x10
180 #define OSCONTROL_ACAL_NO_CAL 0x00
181 #define OSCONTROL_ACAL_17_MIN 0x40
182 #define OSCONTROL_ACAL_9_MIN 0x60
183 #define OSCONTROL_OSEL 0x80
184 
185 /** @} */
186 /* -------------------------------------------------------------------------- */
187 /** \name RTCC operational values
188  * @{
189  */
190 /* I2C address (7-bits) */
191 #define AB08XX_ADDR 0x69
192 #define INT_BUFF_SIZE 20L
193 #define TCS_DIODE_3K (TCS_ENABLE + 0x05)
194 #define TCS_DIODE_6K (TCS_ENABLE + 0x06)
195 #define TCS_DIODE_11K (TCS_ENABLE + 0x07)
196 #define RTCC_TOGGLE_PM_BIT 0x20
197 #define RTCC_FIX_10THS_HUNDRETHS 0xF0
198 #define RTCC_FIX_100THS_HUNDRETHS 0xFF
199 #define RTCC_TD_MAP_SIZE (WEEKDAYLS_ADDR + 1)
200 #define RTCC_ALARM_MAP_SIZE (WEEKDAYS_ALARM_ADDR + 1)
201 #define RTCC_CONFIG_MAP_SIZE (BREF_CTRL_ADDR + 1)
202 /** @} */
203 /* -------------------------------------------------------------------------- */
204 /** \name RTCC error values
205  * @{
206  */
207 #define AB08_ERROR (-1)
208 #define AB08_SUCCESS 0x00
209 /** @} */
210 /* -------------------------------------------------------------------------- */
211 /** \name RTCC enumeration and options
212  * @{
213  */
214 enum {
215  RTCC_PRINT_DATE = 0,
216  RTCC_PRINT_CONFIG,
217  RTCC_PRINT_ALARM,
218  RTCC_PRINT_ALARM_DEC,
219  RTCC_PRINT_DATE_DEC,
220  RTCC_PRINT_MAX,
221 };
222 /* -------------------------------------------------------------------------- */
223 enum {
224  RTCC_ALARM_OFF = 0,
225  RTCC_ALARM_ON,
226  RTCC_ALARM_MAX,
227 };
228 /* -------------------------------------------------------------------------- */
229 enum {
230  RTCC_CMD_UNLOCK = 0,
231  RTCC_CMD_LOCK,
232  RTCC_CMD_ENABLE,
233  RTCC_CMD_STOP,
234  RTCC_CMD_MAX,
235 };
236 /* -------------------------------------------------------------------------- */
237 enum {
238  RTCC_24H_MODE = 0,
239  RTCC_12H_MODE_AM,
240  RTCC_12H_MODE_PM,
241 };
242 /* -------------------------------------------------------------------------- */
243 enum {
244  RTCC_CENTURY_19XX_21XX = 1,
245  RTCC_CENTURY_20XX,
246 };
247 /* -------------------------------------------------------------------------- */
248 enum {
249  RTCC_REPEAT_NONE = 0,
250  RTCC_REPEAT_YEAR,
251  RTCC_REPEAT_MONTH,
252  RTCC_REPEAT_WEEK,
253  RTCC_REPEAT_DAY,
254  RTCC_REPEAT_HOUR,
255  RTCC_REPEAT_MINUTE,
256  RTCC_REPEAT_SECOND,
257  RTCC_REPEAT_10THS,
258  RTCC_REPEAT_100THS,
259 };
260 /* -------------------------------------------------------------------------- */
261 enum {
262  RTCC_CONFKEY_OSCONTROL = 0xA1,
263  RTCC_CONFKEY_SWRESET = 0x3C,
264  RTCC_CONFKEY_DEFREGS = 0x9D,
265 };
266 /* -------------------------------------------------------------------------- */
267 enum {
268  RTCC_CAL_XT_OSC = 0,
269  RTCC_CAL_RC_OSC,
270 };
271 /* -------------------------------------------------------------------------- */
272 enum {
273  RTCC_AUTOCAL_DISABLE = 0,
274  RTCC_AUTOCAL_ONCE,
275  RTCC_AUTOCAL_17_MIN,
276  RTCC_AUTOCAL_9_MIN,
277 };
278 /** @} */
279 /* -------------------------------------------------------------------------- */
280 /** \name Readable Date and time memory map implementation
281  *
282  * This simplified structure allows the user to set date/alarms with a
283  * reduced structure, without the bit-defined restrictions of the memory map,
284  * using decimal values
285  *
286  * @{
287  */
288 typedef struct ab0805_struct_simple_td_reg {
289  uint8_t miliseconds;
290  uint8_t seconds;
291  uint8_t minutes;
292  uint8_t hours;
293  uint8_t day;
294  uint8_t months;
295  uint8_t years;
296  uint8_t weekdays;
297  uint8_t mode;
298  uint8_t century;
299 } __attribute__ ((packed)) simple_td_map;
300 /** @} */
301 /* -------------------------------------------------------------------------- */
302 /**
303  * \name RTCC User functions
304  * @{
305  */
306 
307 /**
308  * \brief Set the time and date
309  * \param *data Time and date value (decimal format)
310  * \return
311  * \ AB08_SUCCESS date/time set
312  * \ AB08_ERROR failed to set time/date (enable DEBUG for more info)
313  */
314 int8_t rtcc_set_time_date(simple_td_map *data);
315 
316 /**
317  * \brief Get the current time and date
318  * \param *data buffer to store the results
319  * \return
320  * \ AB08_SUCCESS date/time set
321  * \ AB08_ERROR failed to set time/date (enable DEBUG for more info)
322  */
323 int8_t rtcc_get_time_date(simple_td_map *data);
324 
325 /**
326  * \brief Print data from the RTCC module, either from the memory
327  * map (values in BCD) or actual readable data (decimal).
328  * \param value value to print, see RTCC_PRINT_* options available
329  * \return
330  * \ AB08_SUCCESS date/time set
331  * \ AB08_ERROR failed to set time/date (enable DEBUG for more info)
332  */
333 int8_t rtcc_print(uint8_t value);
334 
335 /**
336  * \brief Configure the RTCC to match an alarm counter
337  * \param data date and time values (in decimal) to match against
338  * \param state set on/off the alarm interruption
339  * \param repeat set the frequency of the alarm (minute, hourly, daily, etc.)
340  * \return
341  * \ AB08_SUCCESS date/time set
342  * \ AB08_ERROR failed to set time/date (enable DEBUG for more info)
343  */
344 int8_t rtcc_set_alarm_time_date(simple_td_map *data, uint8_t state,
345  uint8_t repeat);
346 
347 /**
348  * \brief Manually calibrate the RTCC
349  * \param mode oscillator to calibrate
350  * \param adjust value (in ppm) to adjust the oscillator
351  * \return
352  * \ AB08_SUCCESS date/time set
353  * \ AB08_ERROR failed to set time/date (enable DEBUG for more info)
354  */
355 int8_t rtcc_set_calibration(uint8_t mode, int32_t adjust);
356 
357 /**
358  * \brief Set the autocallibration period
359  * \param period autocalibration configuration
360  * \return
361  * \ AB08_SUCCESS date/time set
362  * \ AB08_ERROR failed to set time/date (enable DEBUG for more info)
363  */
364 int8_t rtcc_set_autocalibration(uint8_t period);
365 
366 /**
367  * \brief Initialize the RTCC, configures the I2C bus, interrupts and registers
368  * \return
369  * \ AB08_SUCCESS date/time set
370  * \ AB08_ERROR failed to set time/date (enable DEBUG for more info)
371  */
372 int8_t rtcc_init(void);
373 /** @} */
374 /* -------------------------------------------------------------------------- */
375 #endif /* ifndef RTCC_H_ */
376 /* -------------------------------------------------------------------------- */
377 /**
378  * @}
379  * @}
380  */
#define __attribute__(nothing)
Define attribute to nothing since it isn't handled by IAR.
Definition: iar.h:194
int8_t rtcc_set_alarm_time_date(simple_td_map *data, uint8_t state, uint8_t repeat)
Configure the RTCC to match an alarm counter.
Definition: rtcc.c:391
int8_t rtcc_print(uint8_t value)
Print data from the RTCC module, either from the memory map (values in BCD) or actual readable data (...
Definition: rtcc.c:584
int8_t rtcc_set_calibration(uint8_t mode, int32_t adjust)
Manually calibrate the RTCC.
Definition: rtcc.c:716
int8_t rtcc_set_autocalibration(uint8_t period)
Set the autocallibration period.
Definition: rtcc.c:660
int8_t rtcc_get_time_date(simple_td_map *data)
Get the current time and date.
Definition: rtcc.c:368
int8_t rtcc_init(void)
Initialize the RTCC, configures the I2C bus, interrupts and registers.
Definition: rtcc.c:832
int8_t rtcc_set_time_date(simple_td_map *data)
Set the time and date.
Definition: rtcc.c:271