Contiki 3.x
crypto.c
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1 /*
2  * Copyright (c) 2013, ADVANSEE - http://www.advansee.com/
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  * notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  * notice, this list of conditions and the following disclaimer in the
12  * documentation and/or other materials provided with the distribution.
13  *
14  * 3. Neither the name of the copyright holder nor the names of its
15  * contributors may be used to endorse or promote products derived
16  * from this software without specific prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
21  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
22  * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
25  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
27  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
29  * OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 /**
32  * \addtogroup cc2538-crypto
33  * @{
34  *
35  * \file
36  * Implementation of the cc2538 AES/SHA cryptoprocessor driver
37  */
38 #include "contiki.h"
39 #include "sys/energest.h"
40 #include "dev/sys-ctrl.h"
41 #include "dev/nvic.h"
42 #include "dev/crypto.h"
43 #include "dev/aes.h"
44 #include "reg.h"
45 #include "lpm.h"
46 
47 #include <stdbool.h>
48 /*---------------------------------------------------------------------------*/
49 static volatile struct process *notification_process = NULL;
50 /*---------------------------------------------------------------------------*/
51 /** \brief The AES/SHA cryptoprocessor ISR
52  *
53  * This is the interrupt service routine for the AES/SHA
54  * cryptoprocessor.
55  *
56  * This ISR is called at worst from PM0, so lpm_exit() does not need
57  * to be called.
58  */
59 void
61 {
62  ENERGEST_ON(ENERGEST_TYPE_IRQ);
63 
66 
67  if(notification_process != NULL) {
68  process_poll((struct process *)notification_process);
69  notification_process = NULL;
70  }
71 
72  ENERGEST_OFF(ENERGEST_TYPE_IRQ);
73 }
74 /*---------------------------------------------------------------------------*/
75 static bool
76 permit_pm1(void)
77 {
78  return REG(AES_CTRL_ALG_SEL) == 0;
79 }
80 /*---------------------------------------------------------------------------*/
81 void
83 {
84  volatile int i;
85 
86  lpm_register_peripheral(permit_pm1);
87 
88  crypto_enable();
89 
90  /* Reset the AES/SHA cryptoprocessor */
92  for(i = 0; i < 16; i++);
94 }
95 /*---------------------------------------------------------------------------*/
96 void
98 {
99  /* Enable the clock for the AES/SHA cryptoprocessor */
103 }
104 /*---------------------------------------------------------------------------*/
105 void
107 {
108  /* Gate the clock for the AES/SHA cryptoprocessor */
112 }
113 /*---------------------------------------------------------------------------*/
114 void
116 {
117  notification_process = p;
118 }
119 
120 /** @} */
void process_poll(struct process *p)
Request a process to be polled.
Definition: process.c:371
#define NVIC_INT_AES
AES.
Definition: nvic.h:98
Header file with register manipulation macro definitions.
Header file for the cc2538 AES driver.
#define SYS_CTRL_DCGCSEC_AES
AES clock enable, PM0.
Definition: sys-ctrl.h:186
void crypto_enable(void)
Enables the AES/SHA cryptoprocessor.
Definition: crypto.c:97
#define SYS_CTRL_RCGCSEC_AES
AES clock enable, CPU running.
Definition: sys-ctrl.h:172
Header file for the ARM Nested Vectored Interrupt Controller.
Header file for the energy estimation mechanism
#define SYS_CTRL_SCGCSEC
Sec Mod clocks - sleep mode.
Definition: sys-ctrl.h:84
#define AES_CTRL_ALG_SEL
Algorithm select.
Definition: aes.h:130
void crypto_disable(void)
Disables the AES/SHA cryptoprocessor.
Definition: crypto.c:106
#define NULL
The null pointer.
void nvic_interrupt_unpend(uint32_t intr)
Sets intr to no longer pending.
Definition: nvic.c:106
#define SYS_CTRL_SRSEC
Sec Mod reset control.
Definition: sys-ctrl.h:86
#define SYS_CTRL_DCGCSEC
Sec Mod clocks - PM0.
Definition: sys-ctrl.h:85
Header file for the cc2538 System Control driver.
#define SYS_CTRL_SCGCSEC_AES
AES clock enable, CPU IDLE.
Definition: sys-ctrl.h:179
void crypto_init(void)
Enables and resets the AES/SHA cryptoprocessor.
Definition: crypto.c:82
Header file for the cc2538 AES/SHA cryptoprocessor driver.
void lpm_register_peripheral(lpm_periph_permit_pm1_func_t permit_pm1_func)
Register a peripheral function which will get called by the LPM module to get 'permission' to drop to...
void crypto_isr(void)
The AES/SHA cryptoprocessor ISR.
Definition: crypto.c:60
void nvic_interrupt_disable(uint32_t intr)
Disables interrupt intr.
Definition: nvic.c:71
void crypto_register_process_notification(struct process *p)
Registers a process to be notified of the completion of a crypto operation.
Definition: crypto.c:115
#define SYS_CTRL_RCGCSEC
Sec Mod clocks - active mode.
Definition: sys-ctrl.h:83
#define SYS_CTRL_SRSEC_AES
AES is reset.
Definition: sys-ctrl.h:193