Contiki 3.x
Modules | Files | Functions
OpenMote-CC2538 platform

The OpenMote-CC2538 is based on the CC2538, the new platform by Texas Instruments based on an ARM Cortex-M3 core and a IEEE 802.15.4 radio. More...

Modules

 OpenMote-CC2538 platform
 The OpenMote-CC2538 platform was designed at UC Berkeley in 2013 and is comercialized by OpenMote Technologies since 2014.
 
 OpenMote-CC2538 antenna switch
 Driver for the OpenMote-CC2538 antenna switch.
 
 OpenMote-CC2538 user button driver
 The user button will generate a sensors_changed event on press as well as on release.
 
 OpenMote-CC2538 LED driver
 
 OpenMote-CC2538 sensors
 Generic module controlling sensors on the OpenMote-CC2538 platform.
 
 TPS62730 voltage regulator
 Driver for the TPS62730 voltage regulator, to enable power from the battery voltage (bypass, Vout=Vin, Iq < 1uA) or through the buck regulator (on, Vout=2.1V, Iq = 30uA)
 

Files

file  board.c
 Board-initialisation for the OpenMote-CC2538 platform.
 
file  board.h
 This file provides connectivity information on LEDs, Buttons, UART and other OpenMote-CC2538 peripherals.
 
file  contiki-conf.h
 Configuration for the OpenMote-CC2538 platform.
 
file  contiki-main.c
 Main module for the OpenMote-CC2538 platform.
 

Functions

void board_init (void)
 Board specific iniatialisation.
 
int main (void)
 Main routine for the OpenMote-CC2538 platforms. More...
 

OpenMote-CC2538 LED configuration

LEDs on the OpenMote-CC2538 are connected as follows:

  • LED1 (Red) -> PC4
  • LED2 (Yellow) -> PC6
  • LED3 (Green) -> PC7
  • LED4 (Orange) -> PC5
#define LEDS_RED   16
 LED1 (Red) -> PC4.
 
#define LEDS_YELLOW   64
 LED2 (Yellow) -> PC6.
 
#define LEDS_GREEN   128
 LED3 (Green) -> PC7.
 
#define LEDS_ORANGE   32
 LED4 (Orange) -> PC5.
 
#define LEDS_CONF_ALL   240
 
#define PLATFORM_HAS_LEDS   1
 

USB configuration

The USB pullup is driven by PC0

#define USB_PULLUP_PORT   GPIO_C_NUM
 
#define USB_PULLUP_PIN   0
 

UART configuration

On the OpenMote, the UART is connected to the following ports/pins

  • RX: PA0
  • TX: PA1
  • CTS: PB0 (Can only be used with UART1)
  • RTS: PD3 (Can only be used with UART1)

We configure the port to use UART0. To use UART1, replace UART0_* with UART1_* below.

#define UART0_RX_PORT   GPIO_A_NUM
 
#define UART0_RX_PIN   0
 
#define UART0_TX_PORT   GPIO_A_NUM
 
#define UART0_TX_PIN   1
 
#define UART1_RX_PORT   GPIO_B_NUM
 
#define UART1_RX_PIN   0
 
#define UART1_TX_PORT   GPIO_D_NUM
 
#define UART1_TX_PIN   3
 
#define UART1_CTS_PORT   (-1)
 
#define UART1_CTS_PIN   (-1)
 
#define UART1_RTS_PORT   (-1)
 
#define UART1_RTS_PIN   (-1)
 

OpenMote-CC2538 Button configuration

Buttons on the OpenMote-CC2538 are connected as follows:

  • BUTTON_USER -> PC3
#define BUTTON_USER_PORT   GPIO_C_NUM
 BUTTON_USER -> PC3.
 
#define BUTTON_USER_PIN   3
 
#define BUTTON_USER_VECTOR   NVIC_INT_GPIO_PORT_C
 
#define PLATFORM_HAS_BUTTON   1
 

SPI (SSI0) configuration

These values configure which CC2538 pins to use for the SPI (SSI0) lines.

The SSI0 is currently used to interface with the Ethernet driver (ENC28J60) on the OpenBase board.

#define SPI_CLK_PORT   GPIO_A_NUM
 
#define SPI_CLK_PIN   2
 
#define SPI_MOSI_PORT   GPIO_A_NUM
 
#define SPI_MOSI_PIN   5
 
#define SPI_MISO_PORT   GPIO_A_NUM
 
#define SPI_MISO_PIN   4
 

SPI (SSI1) configuration

These values configure which CC2538 pins to use for the SPI (SSI1) lines.

The SSI1 is currently not used.

#define SPI1_CLK_PORT   GPIO_C_NUM
 
#define SPI1_CLK_PIN   4
 
#define SPI1_TX_PORT   GPIO_C_NUM
 
#define SPI1_TX_PIN   5
 
#define SPI1_RX_PORT   GPIO_C_NUM
 
#define SPI1_RX_PIN   6
 

I2C configuration

These values configure which CC2538 pins to use for the I2C lines.

#define I2C_SCL_PORT   GPIO_B_NUM
 
#define I2C_SCL_PIN   3
 
#define I2C_SDA_PORT   GPIO_B_NUM
 
#define I2C_SDA_PIN   4
 

Device string used on startup

#define BOARD_STRING   "OpenMote-CC2538"
 

Compiler configuration and platform-specific type definitions

Those values are not meant to be modified by the user

typedef uint32_t clock_time_t
 
typedef uint32_t uip_stats_t
 
typedef uint32_t rtimer_clock_t
 
#define CLOCK_CONF_SECOND   128
 
#define CCIF
 
#define CLIF
 
#define RTIMER_CLOCK_DIFF(a, b)   ((int32_t)((a) - (b)))
 

Serial Boot Loader Backdoor configuration

#define FLASH_CCA_CONF_BOOTLDR_BACKDOOR   1
 Enable the boot loader backdoor.
 
#define FLASH_CCA_CONF_BOOTLDR_BACKDOOR_PORT_A_PIN   6
 Pin PA6 (ON/SLEEP on the OpenBase), activates the boot loader.
 
#define FLASH_CCA_CONF_BOOTLDR_BACKDOOR_ACTIVE_HIGH   0
 A logic low level activates the boot loader.
 

CFS configuration

#define COFFEE_CONF_SIZE   (4 * COFFEE_SECTOR_SIZE)
 

Watchdog Timer configuration

#define WATCHDOG_CONF_ENABLE   1
 Enable the watchdog timer.
 

USB 'core' configuration

Those values are not meant to be modified by the user, except where stated otherwise

#define CTRL_EP_SIZE   8
 
#define USB_EP1_SIZE   32
 
#define USB_EP2_SIZE   64
 
#define USB_EP3_SIZE   64
 
#define USB_ARCH_WRITE_NOTIFY   0
 
#define USB_ARCH_CONF_DMA   1
 Change to Enable/Disable USB DMA.
 

Generic Configuration directives

#define ENERGEST_CONF_ON   0
 Energest Module.
 
#define STARTUP_CONF_VERBOSE   1
 Set to 0 to decrease startup verbosity.
 

uDMA Configuration and channel allocations

#define USB_ARCH_CONF_RX_DMA_CHAN   0
 USB -> RAM DMA channel.
 
#define USB_ARCH_CONF_TX_DMA_CHAN   1
 RAM -> USB DMA channel.
 
#define CC2538_RF_CONF_TX_DMA_CHAN   2
 RF -> RAM DMA channel.
 
#define CC2538_RF_CONF_RX_DMA_CHAN   3
 RAM -> RF DMA channel.
 
#define UDMA_CONF_MAX_CHANNEL   CC2538_RF_CONF_RX_DMA_CHAN
 

Character I/O Configuration

#define UART_CONF_ENABLE   1
 Enable/Disable UART I/O.
 
#define UART0_CONF_BAUD_RATE   115200
 Default UART0 baud rate.
 
#define UART1_CONF_BAUD_RATE   115200
 Default UART1 baud rate.
 
#define SLIP_ARCH_CONF_USB   0
 SLIP over UART by default.
 
#define CC2538_RF_CONF_SNIFFER_USB   0
 Sniffer out over UART by default.
 
#define DBG_CONF_USB   0
 All debugging over UART by default.
 
#define SERIAL_LINE_CONF_UART   0
 UART to use with serial line.
 
#define SLIP_ARCH_CONF_UART   0
 UART to use with SLIP.
 
#define CC2538_RF_CONF_SNIFFER_UART   0
 UART to use with sniffer.
 
#define DBG_CONF_UART   0
 UART to use for debugging.
 
#define UART1_CONF_UART   0
 UART to use for examples relying on the uart1_* API.
 
#define SLIP_BRIDGE_CONF_NO_PUTCHAR   1
 
#define SLIP_RADIO_CONF_NO_PUTCHAR   1
 
#define CC2538_RF_CONF_SNIFFER   0
 
#define CC2538_CONF_QUIET   0
 Define this as 1 to build a headless node. More...
 
#define USB_SERIAL_CONF_ENABLE
 Enable the USB core only if we need it.
 
#define UART_IN_USE_BY_SERIAL_LINE(u)   (SERIAL_LINE_CONF_UART == (u))
 
#define UART_IN_USE_BY_SLIP(u)
 
#define UART_IN_USE_BY_RF_SNIFFER(u)
 
#define UART_IN_USE_BY_DBG(u)   (!DBG_CONF_USB && DBG_CONF_UART == (u))
 
#define UART_IN_USE_BY_UART1(u)   (UART1_CONF_UART == (u))
 
#define UART_IN_USE(u)
 

Network Stack Configuration

#define NETSTACK_CONF_NETWORK   sicslowpan_driver
 
#define NETSTACK_CONF_MAC   csma_driver
 
#define NETSTACK_CONF_RDC   contikimac_driver
 
#define NULLRDC_802154_AUTOACK   1
 
#define NULLRDC_802154_AUTOACK_HW   1
 
#define CONTIKIMAC_CONF_WITH_PHASE_OPTIMIZATION   0
 
#define WITH_FAST_SLEEP   1
 
#define NETSTACK_CONF_RDC_CHANNEL_CHECK_RATE   8
 
#define NETSTACK_CONF_FRAMER   framer_802154
 
#define NETSTACK_CONF_RADIO   cc2538_rf_driver
 

LPM configuration

#define LPM_CONF_ENABLE   1
 Set to 0 to disable LPM entirely.
 
#define LPM_CONF_MAX_PM   1
 Maximum PM. More...
 
#define LPM_CONF_STATS   0
 Set to 1 to enable LPM-related stats.
 

IEEE address configuration

Used to generate our RIME & IPv6 address

#define IEEE_ADDR_CONF_HARDCODED   0
 Location of the IEEE address 0 => Read from InfoPage, 1 => Use a hardcoded address, configured by IEEE_ADDR_CONF_ADDRESS.
 
#define IEEE_ADDR_CONF_ADDRESS   { 0x00, 0x12, 0x4B, 0x00, 0x89, 0xAB, 0xCD, 0xEF }
 The hardcoded IEEE address to be used when IEEE_ADDR_CONF_HARDCODED is defined as 1.
 
#define IEEE_ADDR_CONF_USE_SECONDARY_LOCATION   0
 Location of the IEEE address in the InfoPage when IEEE_ADDR_CONF_HARDCODED is defined as 0 0 => Use the primary address location 1 => Use the secondary address location.
 

RF configuration

#define IEEE802154_CONF_PANID   0xABCD
 
#define CC2538_RF_CONF_CHANNEL   26
 
#define CC2538_RF_CONF_AUTOACK   1
 RF H/W generates ACKs.
 
#define CC2538_RF_CONF_TX_USE_DMA   1
 RF TX over DMA.
 
#define CC2538_RF_CONF_RX_USE_DMA   1
 RF RX over DMA.
 

IPv6, RIME and network buffer configuration

#define LINKADDR_CONF_SIZE   8
 
#define UIP_CONF_LL_802154   1
 
#define UIP_CONF_LLH_LEN   0
 
#define UIP_CONF_NETIF_MAX_ADDRESSES   3
 
#define UIP_CONF_TCP   1
 
#define UIP_CONF_TCP_MSS   64
 
#define UIP_CONF_UDP   1
 
#define UIP_CONF_UDP_CHECKSUMS   1
 
#define UIP_CONF_ICMP6   1
 
#define UIP_CONF_ROUTER   1
 
#define UIP_CONF_ND6_SEND_RA   0
 
#define UIP_CONF_IP_FORWARD   0
 
#define RPL_CONF_STATS   0
 
#define RPL_CONF_OF   rpl_mrhof
 
#define UIP_CONF_ND6_REACHABLE_TIME   600000
 
#define UIP_CONF_ND6_RETRANS_TIMER   10000
 
#define NBR_TABLE_CONF_MAX_NEIGHBORS   20
 
#define UIP_CONF_MAX_ROUTES   20
 
#define UIP_CONF_BUFFER_SIZE   1300
 
#define UIP_CONF_IPV6_QUEUE_PKT   0
 
#define UIP_CONF_IPV6_CHECKS   1
 
#define UIP_CONF_IPV6_REASSEMBLY   0
 
#define UIP_CONF_MAX_LISTENPORTS   8
 
#define SICSLOWPAN_CONF_COMPRESSION   SICSLOWPAN_COMPRESSION_HC06
 
#define SICSLOWPAN_CONF_COMPRESSION_THRESHOLD   63
 
#define SICSLOWPAN_CONF_FRAG   1
 
#define SICSLOWPAN_CONF_MAXAGE   8
 
#define SICSLOWPAN_CONF_MAX_ADDR_CONTEXTS   1
 
#define SICSLOWPAN_CONF_ADDR_CONTEXT_0
 
#define MAC_CONF_CHANNEL_CHECK_RATE   8
 
#define QUEUEBUF_CONF_NUM   8
 

Security

#define CRYPTO_CONF_INIT   1
 Whether to init cryptoprocessor.
 
#define AES_128_CONF   cc2538_aes_128_driver
 AES-128 driver.
 
#define CCM_STAR_CONF   cc2538_ccm_star_driver
 AES-CCM* driver.
 

Detailed Description

The OpenMote-CC2538 is based on the CC2538, the new platform by Texas Instruments based on an ARM Cortex-M3 core and a IEEE 802.15.4 radio.

Macro Definition Documentation

#define CC2538_CONF_QUIET   0

Define this as 1 to build a headless node.

The UART will not be initialised its clock will be gated, offering some energy savings. The USB will not be initialised either

Definition at line 254 of file contiki-conf.h.

#define LPM_CONF_MAX_PM   1

Maximum PM.

The SoC will never drop to a Power Mode deeper than the one specified here. 0 for PM0, 1 for PM1 and 2 for PM2

Definition at line 383 of file contiki-conf.h.

Function Documentation

int main ( void  )